The present disclosure relates to an imaging element and imaging device, and more particularly, to a column readout solid-state imaging element and an imaging device having the same.
In recent years, fast readout techniques have become important as a result of increased number of pixels and higher frame rate in a solid-state imaging element adapted to convert light admitted, for example, into a digital camera into an electric signal and output the converted image signal. Among such solid-state imaging elements capable of fast readout is MOS (Metal Oxide Semiconductor) image sensor (refer, for example, to Japanese Patent Laid-Open Nos. 2005-328135 and 2005-311487).
MOS image sensors can be manufactured by a process similar to that for CMOS (Complementary Metal Oxide Semiconductor) integrated circuits. As a result, analog circuitry adapted to convert electric charge into an electric signal for each pixel and process the converted electric signal for each column can be mixed with logic and other circuitry in the same chip in a MOS image sensor. The MOS image sensor manufactured in this manner is capable of processing electric signals, each read out from one of the columns, in parallel, thus providing improved readout speed.
FIG. 11 illustrates the schematic configuration of a traditional column readout solid-state imaging element (image sensor) described, for example, in Japanese Patent Laid-Open Nos. 2005-328135 and 2005-311487. A solid-state imaging element 500 includes a pixel array section 1 and current source circuit section 501. The pixel array section 1 has a plurality of pixels 10 arranged in a matrix form. The current source circuit section 501 controls the readout operation adapted to read out an electric signal from each of the pixels 10. It should be noted that the current source circuit section 501 includes a plurality of current source circuits 502 and is provided one for each column. The solid-state imaging element 500 further includes a vertical drive circuit 3, column readout circuit 4 and current control circuit 5. The current control circuit 5 controls the operation of the current source circuit section 501.
Each of the current source circuits 502 normally includes a single stage of a MOSFET (MOS Field-Effect Transistor) 503 (hereinafter referred to as the current source 503). It should be noted that an example is shown in FIG. 11 in which an NMOS transistor (Negative channel Metal Oxide Semiconductor) transistor adapted to draw a current is used as the current source 503. It should be noted that the current flowing through the current source circuit 502, i.e., the current flowing from the drain electrode to the source electrode of the current source 503, is determined by a potential difference Vgs between the potentials of the gate electrode and source electrode of the current source 503. It should be noted that the gate, source and drain electrodes of a MOS transistor will be hereinafter simply referred to as the gate, source and drain of the MOS transistor.
A gate potential Vgate of each of the current sources 503 is supplied via a gate potential supply line SL provided in common for the current source circuits 502. In the example shown in FIG. 11, the gate potential Vgate is supplied from the current control circuit 5 provided at one end of the gate potential supply line SL. It should be noted that no current flows through the gate potential supply line SL. As a result, the gate potential Vgate of each of current sources 503 is constant.
A source potential VSS of each of the current sources 503 is supplied via a ground line GL provided in common for the current source circuits 502. In the example shown in FIG. 11, both ends of the ground line GL are grounded. The source potential VSS is supplied from both ends of the ground line GL. It should be noted that the ground line GL is used to feed a current I (column current), drawn from the drain to the source of each of the current sources 503, to both sides of the column.
As described above, in the traditional solid-state imaging element 500 shown in FIG. 11, a source follower circuit, made up of an amplifying transistor 14 in the pixel 10 and the current source 503 in the current source circuit 502, is provided for each column (vertical signal line VL) of the pixel array section 1. The source follower circuit transfers the pixel signal (electric signal) converted by each of the pixels 10 to the column readout circuit 4. At this time, fast processing is made possible by simultaneous readout of the pixel signals from the columns and parallel processing of these signals.